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Defect Detection
// overview
Built at TSMC to automate visual inspection of semiconductor wafers during advanced node manufacturing. The pipeline ingests high-resolution wafer images, preprocesses them through a custom augmentation pipeline, and classifies defect types using a fine-tuned ResNet-50 backbone. Replaced a manual QA process that was bottlenecking production throughput on critical layers.
// highlights
97.3% classification accuracy across 12 defect categories
Custom data augmentation pipeline for wafer-specific noise patterns
Reduced manual inspection time by 60% on critical layers
Deployed on AWS with auto-scaling inference endpoints
